M31 Technology announced the availability of its low-voltage and low-power physical IP solutions on TSMC 55nm ultra-low power process technology. The platform provides system-on-a-chip (SoC) designers with significantly competitive low-power advantages for Internet of Things (IoT) applications.
IoT products include wearables, robotic equipment and even machine-to-machine automatic control systems. To support sustained operation for handheld products, designers need SoCs with complex data processing capabilities and low power consumption.
Today’s M31 IP products on TSMC 55nm ultra-low power process technology include “High Density Standard Cell Library,” “General Purpose Standard Cell Library,” “One Port Register File SRAM Compiler,” “Single Port SRAM Compiler,” “Dual Port SRAM Compiler,” “Two Port SRAM Compiler,” and “Via ROM Compiler.”
M31 provides high-density, low-voltage and low-power standard cell libraries with power management kit (PMK), and memory compilers with power management modes including standby mode, retention mode, and power shutdown mode to enable IoT low-voltage and low-power designs. The deliverables contain Front-End models (FE), Back-End models (BE) and Graphical User Interface (GUI) to aid designers in IC chip integration.
“TSMC has launched the foundry segment’s first and most comprehensive ultra-low power technology platform aimed at a wide range of applications for the rapidly evolving Internet of Things (IoT) and wearable device markets,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division.
“We welcome innovative IP to support this platform from partners such as M31 that allows us to expand TSMC’s comprehensive design ecosystem and accelerate our customers’ time-to-market.”
“Through TSMC’s ULP process technology, our IPs reduced 50% of dynamic power consumption and 75% of static power consumption,” said H.P. Lin, M31 Technology’s Chairman. “This is exactly what the IoT market requires for success, and we look forward to continuing our collaboration with TSMC.”
Features:
－ Dual-rail memory architecture：A separate memory core power from peripheral power for dynamic voltage frequency scaling (DVFS) on products with low dynamic operation power.
－ Low VCCMIN memory compiler：M31 creatively developed internal read/write sub-circuitry enabling memory to operate at low voltage for low-voltage and low-power applications.
－ Power gating：For products that require long stand-by power, a power gating technique saving static leakage power consumption with power management modes is provided.
