HSINCHU, Taiwan - Faraday Technology today revealed that its RISC-V based ASIC platform solution has been successful in the design and mass production of next-generation edge AI and IoT system-on-chips (SoCs).
This solution encompasses full system-level design services, such as RISC-V core IP integration, SoC design verification, as well as a full-featured reference design kit consisting of real-time operating system (RTOS) and peripherals drivers. Faraday has enabled mass production of RISC-V based AI SoCs on UMC’s 55ULP process, empowering particular battery-powered performances of the chips for IoT edge devices.
With more than 25 years’ experience in providing end-to-end ASIC design services, Faraday has accumulated robust CPU hardening and IP customization skills to support various ultra-low-power scenarios, including dynamic voltage and frequency scaling (DVFS), power mode switching, and fast system wake-up.
Faraday also specializes in SoC software services, allowing RISC-V RTOS, software libraries, and drivers to work seamlessly with the SoC hardware to perform specific interfacing, sensing and power management functions.
“Faraday’s mass production proven RISC-V based ASIC solution is tailored for customers who want to have robust SoC design capabilities to create SoC differentiation in the burgeoning RISC-V market,” said Flash Lin, Chief Operating Officer of Faraday.
“We have seen many RISC-V ASIC design opportunities, especially in a variety of edge AI, IoT/AIoT, and networking applications. We look forward to implementing more next-generation innovations to benefit our customers and the market.”
